Samsung, TSMC, and Intel Foundry: Preparing for Process and Fab Engineer Interviews

A process engineer and an RTL designer can work on the same chip while spending their days on very different problems. If you are considering a fab role, preparation needs to start with the process area and the responsibilities, not a generic chip design question list.

TSMC, Samsung, and Intel publish technology information that helps you understand their offerings. Those pages do not tell you what a particular team will ask in an interview. This guide separates sourced technical facts from our study suggestions and avoids using market share as a shortcut for choosing an employer.

Which process technologies do TSMC, Samsung, and Intel publish?

The table below contains sourced public technology facts. It is not a comparison of yield, cost, manufacturing quality, or employer attractiveness.

Company	What the reviewed official page supports	Important limit
TSMC	N3 is a 3nm FinFET technology; TSMC says it entered high volume production in 2022	This describes N3, not every TSMC process
Samsung Foundry	Its logic process page lists GAA, FinFET, FD SOI, and planar technology options	The listing does not establish production status for a specific option
Intel Foundry	Intel 18A combines RibbonFET gate all around transistors with PowerVia backside power delivery	The page describes the technologies; it is not a guarantee about a vacancy or fab assignment

Process names are not enough to tell you whether two roles are comparable. A position focused on equipment qualification is different from one focused on transistor models, even if both mention the same technology generation.

Read the relevant page, then ask which module, device, or integration problem the team actually owns. Use the answer to choose the fundamentals and measurement methods you want to refresh.

How do you know what fab role you are applying to?

The following table is MockVise editorial role and study guidance, not an empirical description of interviews at these companies. Use it to organize the job description.

Role area	Question to clarify with the team	Suggested preparation
Process integration	Which parts of the flow and which interactions does the role own?	Trace how a proposed change could affect later steps
Module engineering	Is the focus lithography, etch, deposition, or another module?	Review the physical purpose of that step and relevant measurements
Yield engineering	What data and failure analysis responsibilities are included?	Practice separating patterns, hypotheses, and evidence
Device engineering	Is the role focused on characterization, models, or development?	Connect measured electrical behavior to possible physical causes
Equipment engineering	What are the qualification and support responsibilities?	Explain a structured troubleshooting method
Design enablement	Does the role own rules, models, or customer support?	Explain how process information reaches a design flow

Do not treat every row as homework. Pick the areas named in the vacancy, and ask about ambiguous responsibilities.

Rehearse a data problem carefully

Here is a hypothetical exercise, not a reported interview question: a measurement shifts after maintenance on one tool. What would you do next?

Start by checking the measurement system and defining the change. Is it a shift in the average, an increase in spread, or a small number of unusual points? Which products, tools, lots, and time periods are involved? What else changed?

Then describe competing explanations. A tool issue, a measurement issue, and a change elsewhere in the flow may require different checks. Explain what observation would support or weaken each hypothesis before proposing an intervention.

You do not need to invent a numerical yield improvement. A clear method is enough for a practice exercise. If you use a real project, only give numbers you are allowed to disclose and can explain.

Refresh the fundamentals that support your explanation

For a process role, review the relevant physical mechanisms rather than memorizing a manufacturing vocabulary list. Explain what a step changes, what you can measure afterward, and what trade offs a proposed adjustment introduces.

For a data focused role, review distributions, sampling, control charts, and experiment design. Be ready to explain the difference between observing a correlation and establishing a cause. This is our preparation recommendation, not a claim that any named employer requires a statistics test.

For automation, practice cleaning a small dataset and showing your checks. Our coding and scripting guide offers exercises you can adapt. If the role connects to implementation, our physical design guide provides context for the design side.

What should you ask about the work environment?

Do not assume a shift pattern or cleanroom schedule from the company name. Ask about the location, on call responsibilities, safety training, escalation paths, and how engineers hand work over to colleagues.

Also ask how changes are reviewed and how a new engineer learns the process. For an offer comparison, use our chip design offer checklist, adapting it to the fab role rather than assuming an office based schedule.

Finish with a concrete preparation plan

Choose one technical topic from the vacancy, one data exercise, and one project story. Explain the problem, your method, and how you checked the result. Keep confidential process recipes and employer data out of the discussion.

Confirm the interview schedule and any presentation or analysis exercise with your recruiter. Our project explanation guide helps with the story, and you can book a MockVise mock interview to practice a clear, structured explanation.

Sources: TSMC, Samsung Foundry, Intel Foundry. Technical facts reflect the cited pages reviewed for this update. Role comparisons and exercises are editorial guidance, not employer interview requirements. MockVise is not affiliated with or endorsed by these companies. Confirm role, location, and hiring details with the employer.

FAQ

Q: Do the foundries publish their interview questions? No. The public pages describe technology offerings, and they do not tell you what a particular team will ask in an interview.

Q: What do the public pages say about each foundry's process? TSMC describes N3 as a 3nm FinFET technology that entered high volume production in 2022. Samsung lists GAA, FinFET, FD SOI, and planar options, and Intel describes 18A as combining RibbonFET transistors with PowerVia backside power delivery. None of this compares yield, cost, or manufacturing quality.

Q: How should I approach a data problem such as a measurement shift after tool maintenance? Start by checking the measurement system and defining the change, then lay out competing explanations and what observation would support or weaken each. You do not need to invent a numerical yield improvement, since a clear method is enough.

Q: What should I ask about the work environment in a fab role? Ask about the location, on call responsibilities, safety training, escalation paths, and how engineers hand work over. Do not assume a shift pattern or cleanroom schedule from the company name.